The present invention is related in general to semiconductor integrated circuits, and more particularly to a method and system for adjusting the threshold of devices. Specifically, to use control of the back-bias voltage in semiconductor devices, especially in DRAM sense amplifier circuits, to maintain an aimed-for value of the threshold voltage.
Today""s integrated circuits include a vast number of transistor devices formed in a semiconductor substrate, or body. In many integrated circuits, such as semiconductor memories or typical microprocessors, the devices formed in the semiconductor substrate are metal oxide semiconductor (xe2x80x9cMOSxe2x80x9d) devices. MOS devices come in two varieties, NMOS and PMOS devices. In most modern integrated circuits one finds both of these devices, and the name CMOS is used to describe such circuits. MOS de vices usually have three active terminals; these are the source, the drain, and the gate, the gate being the terminal where an input is typically applied. There is a voltage, called the threshold voltage, or just threshold Vth, between the source and the gate that is important in device operation. Ideally, if the source to gate voltage exceeds the threshold value, the device conducts, or it is in the so called xe2x80x9conxe2x80x9d state. Otherwise the device is in the xe2x80x9coffxe2x80x9d state and does not conduct. In an actual device, however, the transition between the on and off state is not quite as abrupt. Below the threshold the there is still a current flow between the source and the drain. This current, which flows when gate to source voltage is below the threshold voltage, is known as the leakage current.
The integrated circuits and the devices themselves are in a semiconductor substrate, or body. Consequently the whole device can be biased to certain voltage, or potential in relation to the substrate, or body. This bias is a fourth terminal to the device, and the body to source-terminal voltage is called the well-bias, or back-bias. In the following back-bias, well-bias, body-bias terms will be interchangeably used, since all have the same meaning. In modern CMOS circuits the devices are inside so called wells, not in direct electrical contact with the bulk of the substrate, hence the well-bias name. The back-bias also influences device behavior. An important effect of the back-bias is its influence on the device threshold. The further the back-bias goes in the, or toward, the reverse direction, the larger the threshold becomes. Traditionally, only reverse bias between the well and the source was used, but there is no reason in modern low voltage circuits not to consider a forward biasing back-bias in order to lower the threshold. In general, it is known in the art that the back-bias is a tool with which device thresholds in integrated circuits can be regulated.
As power supplies are reduced below 1-Volt, the question of thresholds is becoming ever more problematic. Setting thresholds at a too low value enhances leakage currents, leading to a variety of detrimental effects. On the other hand, too high a threshold leads to poor device performance. Compounding the difficulties are the unavoidable process and temperature variations, all influencing thresholds. The fabrication process that is used to create the integrated circuits on chips is marvelously precise. In spite of this, since there are many millions of devices on a typical chip, it is impossible to maintain completely uniform device behavior across a given chip, or even more so, between different chips. The power supply voltages being so low, a few hundredths of a volt difference in the thresholds due to process variations, something that in earlier times would not have even been noticed, can cause a major disruption in operation. Also, thresholds are sensitive to temperature. In general thresholds increase with decreasing temperature. Again, the threshold differences caused by temperature changes were manageable in earlier days, but are becoming a source of serious concern in modern circuits.
Some of the most vulnerable circuits to unwanted threshold variations are the DRAM sense amplifiers. The operation of these amplifiers involves a precharging step to a so called xe2x80x9cbit-line equalizationxe2x80x9d, Vbleq, voltage. This Vbleq is roughly half of the power supply voltage. This means that the DRAM sense amplifiers are practically as sensitive to threshold variations as if the power supply voltage, already at dangerously low level, were further shrunk by a factor of two.
This invention deals with solving the issue of threshold variation in modern integrated circuits, and in particular to deal with the problem of DRAM sense amplifiers. Optimizing the Vth of DRAM sense amplifier devices over process and temperature becomes very difficult. If thresholds, which during the fabrication process are adjusted by ion implants, are set for high-performance with low Vth at low temperature, excessive leakage may occur at high temperature. This invention shows a system, and method thereof, for modulating the back-bias of the devices in order to meet a constant target, or aimed-for Vth, independently of process and/or temperature variation, and for being able to further fine tune the threshold as the need arises.
Numerous innovations for using back-bias control on MOS devices are available in the prior art that now will be described. Even though these innovations may be suitable for the specific individual purposes which they address, they differ from the present invention.
For example, U.S. Pat. No. 6,048,746 to Burr, incorporated by reference herein, teaches the control of leakage current, but does not teach the present invention.
In a further example, U.S. Pat. No. 6,115,295 to V. Surlekar et al, incorporated by reference herein, teaches the use of back bias to initialize DRAMs, but does not teach the present invention.
In as yet another example. U.S. Pat. No. 6,163,044 to Manning et al, incorporated by reference herein, teaches power reduction through back-biasing with a xe2x80x9cpumpxe2x80x9d circuit, but does not teach the present invention.
The use of back-bias control on MOS devices was also discussed in the recent technical literature. For instance, in xe2x80x9cA well-Synchronized Sensing/Equalizing Method for Sub-1.0V Operating Advanced DRAMsxe2x80x9d Ooishi et al. IEEE JSSC Vol 29, No. 4 April 1994, the concept of back bias control of DRAM sense amplifiers is discussed. However, there is no method to regulate the sense amplifier Vt to a predetermined target value. Also in xe2x80x9cLow Voltage Circuit Design Techniques for Battery Operated and/or Giga-Scale DRAMsxe2x80x9d Yamagata et al., IEEE . . . JSCC Vol 30, no. 11, November 1995, control of a sense amplifier""s back-bias is discussed. However, no circuit for controlling the sense amplifier Vt, independently of process and temperature is shown.
This invention shows a method and circuits to achieve the goal for modulating the back-bias of the devices to meet a constant target, or aimed-for Vth, independently of process and temperature variation, and for being able to further fine tune the threshold as the need arises.
In the present invention the method comprises a step of generating an indicating voltage. This indicating voltage contains information on the momentary Vt value of devices, and in particular of the devices in DRAM sense amplifiers. The indicating voltage generating circuit has a plurality M, where M is in the order of 10, of MOS devices. These MOS devices in the indicating voltage generating circuit are processed to be identical to the DRAM sense amplifier devices. For the sake of specificity we discuss NMOS devices with the understanding that the invention covers the exact same case for PMOS devices with the semiconductor types of N and P interchanged. The M NMOS devices are connected in parallel to form a Vt, indicator. The gates and drains of these indicator NMOSs are connected to a first voltage value. The first voltage can be any value that can easily and reproducibly generated. In one embodiment, this first voltage is conveniently taken to be the bit-line equalization voltage Vbleq. The sources of these M devices are connected to a current source giving a first current I1 of M*I@Vth where I@Vth is the specified current at threshold of a single indicating device, assuming that all the indicating devices are of the same width, and are drawing the same target current at threshold. In an alternate embodiment if not all the indicating devices are of the same size, or width, the first current supplied to the sources of the devices is the sum of the target device-currents at threshold. The first current can be supplied by a current mirror, well known in the art, or by other known precision current sources. The voltage appearing on the sources of the indicating devices is Vi an indicating voltage. In this arrangement the indicating devices are conducting at threshold, and the momentary threshold Vt of the device can be measured as the first voltage minus Vi, or in a preferred embodiment where the first voltage is Vbleq, the threshold of the indicating devices is Vt=Vbleqxe2x88x92Vi. Since the indicating devices are processed to be identical to the DRAM sense amplifier devices, Vt is also the threshold of the DRAM sense amplifier devices.
To ensure that Vt under all conditions is set to a target, or aimed-for threshold Vth, the two threshold voltages have to be compared, and Vt appropriately adjusted. To accomplish this, the aimed-for threshold voltage Vth is subtracted from the first voltage, which in one preferred embodiment is Vbleq, and this way a regulating voltage, Vreg is generated. In a preferred embodiment: Vreg=Vbleqxe2x88x92Vth. In one embodiment this Vreg can be provided as an input from outside the chip that houses the integrated circuits, in other words Vreg is supplied from an off chip source. In an alternate embodiment, Vreg can be derived from an on-chip bandgap reference source with high accuracy. Bandgap reference voltage sources are well known in the art of circuit design.
The indicating Vt is compared to the target Vth, by connecting Vreg and Vi to a differential amplifier, a well known circuit in the art of circuit design. For the case NMOS devices one would typically use a P-type differential amplifier, while for the PMOS case one would typically use an N-type differential amplifier. The differential amplifier output is the back-bias voltage, Vbb. This is applied to the well of all the circuits in need of threshold regulation, in particular it is applied to the DRAM sense amplifier devices. The back-bias voltage, Vbb, is applied also to the indicating devices themselves. In this matter the voltage Vi, which appears on the sources of the indicating devices, is adjusted by automatic action of the negative feedback. This feedback forces Vi to equal Vreg. Consequently the threshold of devices Vt will equal the aimed-for threshold Vth . A constant Vt is achieved over the range of the source to body threshold-sensitivity curve.
This method will find and generate a back bias, Vbb, either in the forward or reverse bias region which will force the device thresholds, in particular the DRAM sense amplifier Vt to the target Vth value, independently of process or temperature variations. One has to be aware that some amount of forward back-bias, below the diode voltage of approximately 0.65 V can be used to decrease the Vt without excessive leakage causing undue problems.
The target, or aimed-for, Vth may be adjusted at different times for different values for efficient signal margin testing to expose signal weakness. At burn-in it may be advantageous to fix the sense amplifier""s back-bias to a known voltage. Tuning for the best value for a target Vth can be made by examining the trade offs between sense amplifier overdrive requirements and excessive off-state leakage. Adjustment of the aimed-for threshold value can be made by on/or off-chip configuration registers, laser fuses and/or electronic fuses. The use of electronic fuses enables the Vth target to be configured to a desirable level before or after packaging, and before and/or after test, burn-in, or during final use. The aimed-for Vth can be tuned for best optimization as a function of operational phases such as temperature, voltage, speed/power requirements, and expected lifetime of the circuits. Within such operational phases the aimed-for Vth can be further dynamically tuned for optimization as a function of momentary function, such as an increase of the threshold during an expected longer stand-by, for the sake power reduction. Alternatively, when high performance is needed, for instance in case of DRAM sense-amplifiers during a read-out phase, the threshold can be aggressively lowered for high performance. Of course, one of skill in the art will appreciate that additional reference schemes can be designed to permit sense amplifier Vth tracking with source voltage, for example, to achieve a constant overdrive.
In a further embodiment the first current I1 may be set to various values. For instance, not only to an appropriate multiple of the threshold current, but to an appropriate multiple of a current which is higher than the exact threshold value. In such a case both Vi and Vreg would be readjusted.